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ČeštinaEnglish

Reduction of security threats at optical networks

Project goals

The project is focused on research, design and development of an active network element, hardware FPGA netowrk card, that enables effective analysis of the transmitted data structures in an optical network in real time, based on standards xPON. It brings innovation in the field of security and the possibility of analysis frameworks GPON G.984, G.987 NG-PON and NG-PON2. This new system will help to improve the security of critical infrastructures and metropolitan netoworks.

Keywords

Attacks detectionoptical networkssecurityxPONNetwork infrastructurecyber security

Public support

  • Provider

    Ministry of Interior

  • Programme

    Security Research Programme of the Czech Republic in the years 2015 - 2022 (BV III / 1 VS)

  • Call for proposals

    Bezpečnostní výzkum České republiky 2 (SMV02017BV002)

  • Main participants

    DFC Design, s.r.o.
    Vysoké učení technické v Brně / Fakulta elektrotechniky a komunikačních technologií

  • Contest type

    VS - Public tender

  • Contract ID

    MV-124102-3/OBVV-2016

Alternative language

  • Project name in Czech

    Redukce bezpečnostních hrozeb v optických sítích

  • Annotation in Czech

    Projekt je soustředěn na výzkum, návrh a vývoj aktivního síťového prvku, hardwarové karty FPGA, která umožní efektivní analýzu přenášených struktur dat v optické síti v reálném čase, založené na standardech xPON. Přináší inovaci v oblasti bezpečnosti a možnosti analýzy rámců GPON G.984, NG-PON G.987 a NG-PON2. V současné době je ve velké míře zastoupena pouze analýza na bázi Ethernet technologie. Tento nový systém přispěje ke zlepšení bezpečnosti kritických a metropolitních infrastruktur.

Scientific branches

  • R&D category

    VV - Exeperimental development

  • CEP classification - main branch

    JA - Electronics and optoelectronics

  • CEP - secondary branch

    JC - Computer hardware and software

  • CEP - another secondary branch

    —

  • 20201 - Electrical and electronic engineering
    20206 - Computer hardware and architecture

Completed project evaluation

  • Provider evaluation

    U - Uspěl podle zadání (s publikovanými či patentovanými výsledky atd.)

  • Project results evaluation

    The objectives set out in the project proposal have been met. The main results of the Project have been achieved. All results are directly related to the project objectives and have been developed during the project.

Solution timeline

  • Realization period - beginning

    Jan 1, 2017

  • Realization period - end

    Dec 31, 2020

  • Project status

    U - Finished project

  • Latest support payment

    Feb 6, 2017

Data delivery to CEP

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

  • Data delivery code

    CEP21-MV0-VI-U/02:1

  • Data delivery date

    Jun 14, 2021

Finance

  • Total approved costs

    17,568 thou. CZK

  • Public financial support

    16,003 thou. CZK

  • Other public sources

    0 thou. CZK

  • Non public and foreign sources

    1,565 thou. CZK

Basic information

Recognised costs

17 568 CZK thou.

Public support

16 003 CZK thou.

91%

Provider

Ministry of Interior

CEP

JA - Electronics and optoelectronics

Solution period

01. 01. 2017 - 31. 12. 2020

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