Open hardware design of Precision Buffer with Low Input Capacitance
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00177016%3A_____%2F19%3AN0000069" target="_blank" >RIV/00177016:_____/19:N0000069 - isvavai.cz</a>
Result on the web
<a href="https://github.com/smaslan/QuADC-buffer" target="_blank" >https://github.com/smaslan/QuADC-buffer</a>
DOI - Digital Object Identifier
—
Alternative languages
Result language
angličtina
Original language name
Open hardware design of Precision Buffer with Low Input Capacitance
Original language description
The main goal was flatness below 0.1 µV/V up to 10 kHz. Calibration uncertainty at 1 MHz requirement was 5 µV/V. Input capacitance as low as possible. Output impedance as low as possible. The circuit uses bootstrapping of the supply voltages which reduces errors significantly and also ensure very low apparent input shunting capacitance. Cost for the solution is limited stability. The buffer cannot be supplied from low impedance source otherwise it tends to oscillate. It designed as output bufffer for the resistive voltage dividers.
Czech name
—
Czech description
—
Classification
Type
Z<sub>tech</sub> - Verified technology
CEP classification
—
OECD FORD branch
20201 - Electrical and electronic engineering
Result continuities
Project
<a href="/en/project/7AX13031" target="_blank" >7AX13031: A quantum standard for sampled electrical measurements</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Others
Publication year
2019
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Internal product ID
Bootstrapped buffer for QuADC EMPIR
Numerical identification
—
Technical parameters
Supply voltage: (±13.5 up to ±15.5) V Supply current: < 100 mA, plus fan current in positive supply Input voltage range: 1.5 Vpk Input capacitance: < 1 pF Input DC resistance: 100 MΩ Output impedance |Z|: < 4 mΩ up to 10 kHz < 12 mΩ up to 100 kHz < 150 mΩ up to 1 MHz Output inductance: < 20 nH Flatness: < 0.1 μV/V up to 10 kHz < 2 μV/V up to 100 kHz < 100 μV/V up to 1 MHz (depends on the cable and load) Estimated THD: < 140 dB up to 100 kHz (10 harmonics) < 106 dB up to 1 MHz (bw. 6 MHz)
Economical parameters
Speed up of calibration processes, savings 50 000,- Kč.
Application category by cost
—
Owner IČO
00177016
Owner name
Czech Metrology Institute
Owner country
CZ - CZECH REPUBLIC
Usage type
N - Využití výsledku jiným subjektem je možné bez nabytí licence (výsledek není licencován)
Licence fee requirement
—
Web page
https://github.com/smaslan/QuADC-buffer