VHDL Design Verification Tools
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216224%3A14330%2F09%3A00035592" target="_blank" >RIV/00216224:14330/09:00035592 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Alternative languages
Result language
angličtina
Original language name
VHDL Design Verification Tools
Original language description
The software package consists of three modules - VHD2XML, OPTIMVHD, and ANALYSEVHD. First, the module VHD2XML performs translation from VHDL into XML (abstract syntax tree). OPTIMVHD performs optimizations at the XML level, in particular, the individualVHDL constructs are normalized. Finally, the module ANALYSEVHD performs basic static analysis of the program. Currently supported analysis feature is interconnection of wires/signals among VHDL entities.
Czech name
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Czech description
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Classification
Type
R - Software
CEP classification
IN - Informatics
OECD FORD branch
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Result continuities
Project
<a href="/en/project/1M0545" target="_blank" >1M0545: Institute for Theoretical Computer Science</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)<br>S - Specificky vyzkum na vysokych skolach
Others
Publication year
2009
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Internal product ID
VHD2XML
Technical parameters
Balíček programů pro převod VHDL programů do uniformní reprezentace v XML formátu na jehož úrovni je implementována statická analýza chyb.
Economical parameters
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Owner IČO
00216224
Owner name
Masarykova univerzita