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Computer Analysis of Real SC Circuits

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F00%3A43500069" target="_blank" >RIV/00216305:26220/00:43500069 - isvavai.cz</a>

  • Result on the web

  • DOI - Digital Object Identifier

Alternative languages

  • Result language

    angličtina

  • Original language name

    Computer Analysis of Real SC Circuits

  • Original language description

    This contribution deals with methods used for the time-domain analysis of real switched-capacitor (SC) networks. Methods for linear SC circuits, for non-linear general switched networks with externally controlled switches, and for linear and non-linear switched networks with internally controlled switches are described.

  • Czech name

  • Czech description

Classification

  • Type

    D - Article in proceedings

  • CEP classification

    JA - Electronics and optoelectronics

  • OECD FORD branch

Result continuities

  • Project

  • Continuities

    Z - Vyzkumny zamer (s odkazem do CEZ)

Others

  • Publication year

    2000

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Article name in the collection

    Proceedings of 23rd the International Conference "Telecommunications and Signal Processing 2000"

  • ISBN

    80-7204-161-4

  • ISSN

  • e-ISSN

  • Number of pages

    4

  • Pages from-to

  • Publisher name

    FEI VUT Brno

  • Place of publication

    Brno

  • Event location

  • Event date

  • Type of event by nationality

  • UT code for WoS article