Video Compression Hardware Implementation Using Programmable Media Processor

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F03%3APU33903" target="_blank" >RIV/00216305:26220/03:PU33903 - isvavai.cz</a>

Result on the web

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DOI - Digital Object Identifier

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Result language

angličtina

Original language name

Video Compression Hardware Implementation Using Programmable Media Processor

Original language description

The contribution deals with the real time hardware implementation of the video compression algorithms. The real time media TM-1300 IREF PCI bus board used for research and education in Laboratory of television technique and video technique FEEC BUT is introduced. The different standards used for coding audio-visual information in a digital compressed format are presented in this paper too. Besides the MPEG family standards and the wavelet-based compression, the 3D-DCT transform is outline as well.

Czech name

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Czech description

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Type

D - Article in proceedings

CEP classification

JA - Electronics and optoelectronics

OECD FORD branch

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Project

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Continuities

Z - Vyzkumny zamer (s odkazem do CEZ)

Publication year

2003

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection

Proceedings EC-VIP-MC 2003

ISBN

953-184-054-7

ISSN

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e-ISSN

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Number of pages

6

Pages from-to

299-304

Publisher name

Neuveden

Place of publication

Zagreb, Chorvatsko

Event location

Zagreb

Event date

Jul 2, 2003

Type of event by nationality

EUR - Evropská akce

UT code for WoS article

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