Some errors cancellation approaches used in ADC using switched capacitor technique

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F03%3APU38047" target="_blank" >RIV/00216305:26220/03:PU38047 - isvavai.cz</a>

Result on the web

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DOI - Digital Object Identifier

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Result language

angličtina

Original language name

Some errors cancellation approaches used in ADC using switched capacitor technique

Original language description

This paper describes some errors cancellation approaches used in ADC using switched capacitor (SC) technique to compensate arising analog errors. In these errors besides mainly capacitor-mismatch, finite gain of OpAmp, charge injection in switches, clockfeedthrough in switches, OpAmp input capacitance and parasitic capacitors. The details of the approaches are described and discussed in this paper.

Czech name

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Czech description

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Type

D - Article in proceedings

CEP classification

JA - Electronics and optoelectronics

OECD FORD branch

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Project

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Continuities

Z - Vyzkumny zamer (s odkazem do CEZ)

Publication year

2003

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection

Applied Electronics 2003

ISBN

80-7082-951-6

ISSN

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e-ISSN

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Number of pages

4

Pages from-to

79-82

Publisher name

NEUVEDEN

Place of publication

Plzeň

Event location

Plzeň

Event date

Sep 10, 2003

Type of event by nationality

CST - Celostátní akce

UT code for WoS article

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