Spartan-3 Development Board for Education
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F05%3APU51428" target="_blank" >RIV/00216305:26220/05:PU51428 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Alternative languages
Result language
angličtina
Original language name
Spartan-3 Development Board for Education
Original language description
This paper describes an introduction into the gate arrays FPGA. Spartan-3 development board was designed. Spartan-3 development board will be used to teach design of logic circuits and VHDL language. This paper describes all components, which are controlled by FPGA Spartan-3.
Czech name
Vývojová deska s obvodem SPARTAN-3
Czech description
Článek popisuje vývojovou desku s obvodem FPGA Spartan-3 určenou pro výuku v předmětu Návrh digitálních integrovaných obvodů a jazyk VHDL.
Classification
Type
D - Article in proceedings
CEP classification
JA - Electronics and optoelectronics
OECD FORD branch
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Result continuities
Project
<a href="/en/project/GD102%2F03%2FH105" target="_blank" >GD102/03/H105: Modern methods of electronic circuit analysis, design and applications</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Others
Publication year
2005
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
EDS'05 IMAPS CS INTERNATIONAL CONFERENCE PROCEEDINGS
ISBN
80-214-2990-9
ISSN
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e-ISSN
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Number of pages
4
Pages from-to
407-410
Publisher name
Ing. Zdenek Novotny CSc.
Place of publication
Brno
Event location
Brno
Event date
Sep 15, 2005
Type of event by nationality
CST - Celostátní akce
UT code for WoS article
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