Symbolic Analysis with Circuit Decomposition
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F05%3APU51583" target="_blank" >RIV/00216305:26220/05:PU51583 - isvavai.cz</a>
Result on the web
—
DOI - Digital Object Identifier
—
Alternative languages
Result language
angličtina
Original language name
Symbolic Analysis with Circuit Decomposition
Original language description
This paper deals with computational complexity of approximate symbolic analysis. A method for symbolic approximation that exploits the sparsity of circuit matrix to achieve an acceptable speed for large circuits is proposed. The method is based on gradual simplification of a block-decomposed circuit model in the frequency domain. The simplified model is then analyzed symbolically. The algorithm has been developed with the aim of obtaining maximum computational efficiency.
Czech name
Symbolická analýza s rozkladem obvodu
Czech description
Článek pojednává o metodě pro snížení výpočetní náročnosti symbolické analýzy rozkladem obvodu na menší bloky.
Classification
Type
D - Article in proceedings
CEP classification
JA - Electronics and optoelectronics
OECD FORD branch
—
Result continuities
Project
Result was created during the realization of more than one project. More information in the Projects tab.
Continuities
Z - Vyzkumny zamer (s odkazem do CEZ)
Others
Publication year
2005
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
Proc. of Radioelektronika'2005
ISBN
80-214-2904-6
ISSN
—
e-ISSN
—
Number of pages
4
Pages from-to
432-435
Publisher name
Brno University of Technology
Place of publication
Brno
Event location
Brno
Event date
May 3, 2005
Type of event by nationality
CST - Celostátní akce
UT code for WoS article
—