Modeling and design of novel architecture of multibit switched-capacitor sigma-delta converter with two-step quantization process
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F06%3APU57572" target="_blank" >RIV/00216305:26220/06:PU57572 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Alternative languages
Result language
angličtina
Original language name
Modeling and design of novel architecture of multibit switched-capacitor sigma-delta converter with two-step quantization process
Original language description
This paper presents a novel architecture of high-order single-stage sigma-delta (ΣΔ) converter for sensor measurement. The two-step quantization technique was utilized to design of novel architecture of ΣΔ modulator. The time steps are interleaved to achieve resolution improvement without decreasing of conversion speed. This technique can be useful for low oversampling ratio. The novel architecture was designed to obtain high dynamic range of input signal, high signal-to-noise ratioand high reliability. This paper describes steps involved in a new VHDL design of a decimation filter for a ΣΔ modulator. Parameters of decimation filter are derived from the specifications of the overall ΣΔ modulator. The proposed architecture of switched-capacitor (SC) ΣΔ modulator was simulated with nonidealities blocks, such as sampling jitter, noise, and operational amplifier parameters (white noise, finite dc gain, finite bandwidth, slew rate and satur
Czech name
Modelování nové architektury sigma-delta modulátoru s vícebitovým zpracováním
Czech description
Článek popisuje novou architekturu převodníku sigma-delta vyššího řádu pro senzorové měření. Převodník s dvoustupňovým kvantovacím procesem je využit jako vícebitový kvantovací obvod.Prezentována acrhitektura byla namodelována v prostředí Matlab Simulink.V článku je také prezentován návrh decimačního filtru pro danou architekturu modulátoru sigma-delta.
Classification
Type
D - Article in proceedings
CEP classification
JA - Electronics and optoelectronics
OECD FORD branch
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Result continuities
Project
Result was created during the realization of more than one project. More information in the Projects tab.
Continuities
Z - Vyzkumny zamer (s odkazem do CEZ)
Others
Publication year
2006
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
The International Conference on Systems, IEEE Computer Society
ISBN
0-7695-2540-7
ISSN
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e-ISSN
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Number of pages
6
Pages from-to
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Publisher name
Morne, Mauritius
Place of publication
NEUVEDEN
Event location
Morne
Event date
Apr 26, 2006
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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