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Serial Communication Peripheries Development in FPGA

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F09%3APU80924" target="_blank" >RIV/00216305:26220/09:PU80924 - isvavai.cz</a>

  • Result on the web

  • DOI - Digital Object Identifier

Alternative languages

  • Result language

    čeština

  • Original language name

    Serial Communication Peripheries Development in FPGA

  • Original language description

    This project is about periphery, which from parallel input signals make one output serial signal. This serial signal contains start bit, the next are data bits, parity bit and stop bit or two stop bits. Data bits are variables. It is mean their count isset with two input signals called Dat0 and Dat1. We can secure data bits with parity bit. After parity bit there is one stop bit or there are two stop bits. The periphery is programmed in VHDL language and implemented in FPGA device. After simulation theimplementation was realized in Xilinx ISE WebPACK and tested in real time.

  • Czech name

    Serial Communication Peripheries Development in FPGA

  • Czech description

    This project is about periphery, which from parallel input signals make one output serial signal. This serial signal contains start bit, the next are data bits, parity bit and stop bit or two stop bits. Data bits are variables. It is mean their count isset with two input signals called Dat0 and Dat1. We can secure data bits with parity bit. After parity bit there is one stop bit or there are two stop bits. The periphery is programmed in VHDL language and implemented in FPGA device. After simulation theimplementation was realized in Xilinx ISE WebPACK and tested in real time.

Classification

  • Type

    D - Article in proceedings

  • CEP classification

    JA - Electronics and optoelectronics

  • OECD FORD branch

Result continuities

  • Project

  • Continuities

    S - Specificky vyzkum na vysokych skolach

Others

  • Publication year

    2009

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Article name in the collection

    Proceedings of the 15th Conference Student EEICT 2009

  • ISBN

    978-80-214-3867-5

  • ISSN

  • e-ISSN

  • Number of pages

    3

  • Pages from-to

  • Publisher name

    Vysoké učení technické v Brně

  • Place of publication

    Brno, ČR

  • Event location

    FEKT VUT v Brně

  • Event date

    Apr 23, 2009

  • Type of event by nationality

    CST - Celostátní akce

  • UT code for WoS article