Accumulation Mode MOS Structure Usage in the Analog Design

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F10%3APU88289" target="_blank" >RIV/00216305:26220/10:PU88289 - isvavai.cz</a>

Result on the web

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DOI - Digital Object Identifier

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Result language

angličtina

Original language name

Accumulation Mode MOS Structure Usage in the Analog Design

Original language description

This article introduce theoretical base for accumulation mode MOS structure usage as capacitor in the design of mixed-mode ASIC circuits. The usage of these structures allows using a pure digital CMOS technology for analog blocks design. The main advantage is low fabrication cost and compatibility with digital process option. The main disadvantage is non-linear capacity dependence on applied voltage that must be compensated.

Czech name

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Czech description

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Type

J_x - Unclassified - Peer-reviewed scientific article (Jimp, Jsc and Jost)

CEP classification

JA - Electronics and optoelectronics

OECD FORD branch

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Project

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Continuities

Z - Vyzkumny zamer (s odkazem do CEZ)

Publication year

2010

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Name of the periodical

Electronics

ISSN

1313-1842

e-ISSN

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Volume of the periodical

4

Issue of the periodical within the volume

1

Country of publishing house

BG - BULGARIA

Number of pages

3

Pages from-to

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UT code for WoS article

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EID of the result in the Scopus database

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