Digital Signal Soft-Processor for Video Processing
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F11%3APU92909" target="_blank" >RIV/00216305:26220/11:PU92909 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Alternative languages
Result language
angličtina
Original language name
Digital Signal Soft-Processor for Video Processing
Original language description
The paper presents a digital signal soft-processor DVSP that was designed using architecture description language ISAC by a tool for processor design called Lissom. Processor is optimized for several video-processing algorithms. Features and instructionset extensions that were introduced to its basic instruction set are described. Processor was synthesized for several Xilinx FPGAs and synthesis and performance results are presented.
Czech name
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Czech description
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Classification
Type
D - Article in proceedings
CEP classification
JA - Electronics and optoelectronics
OECD FORD branch
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Result continuities
Project
Result was created during the realization of more than one project. More information in the Projects tab.
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)<br>Z - Vyzkumny zamer (s odkazem do CEZ)
Others
Publication year
2011
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
Electronic Devices and Systems IMAPS CS International Conference 2011 Proceedings
ISBN
978-80-214-4303-7
ISSN
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e-ISSN
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Number of pages
6
Pages from-to
180-185
Publisher name
Vysoké učení technické v Brně
Place of publication
Brno
Event location
Brno
Event date
Jun 22, 2011
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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