Accelerated Modular Arithmetic for Low-Performance Devices

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F11%3APU93322" target="_blank" >RIV/00216305:26220/11:PU93322 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Result language
angličtina
Original language name
Accelerated Modular Arithmetic for Low-Performance Devices
Original language description
The paper deals with efficient modular arithmetic algorithms for resource restricted devices like smart-cards or sensors. The modular arithmetic is important for a wide variety of computations in these devices, from communication to signal processing. To speed up some cryptographic operations, the most widespread devices often have some cryptographic support provided by a dedicated chip. Our goal is to use the resources of a crypto-coprocessor to accelerate general modular operations. The paper describes our implementation of modular arithmetic operations with large integers, and provides the comparison of the accelerated method with three classical methods for (modular) multiplication.
Czech name
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Czech description
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Project
<a href="/en/project/FR-TI2%2F679" target="_blank" >FR-TI2/679: *Media-informatics system supporting advanced multimedia services</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Publication year
2011
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
34th International Conference on Telecommunications and Signal Processing (TSP 2011)
ISBN
978-1-4577-1411-5
ISSN
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e-ISSN
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Number of pages
5
Pages from-to
1-5
Publisher name
Neuveden
Place of publication
Neuveden
Event location
Budapest
Event date
Aug 18, 2011
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
000299568700028

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