FPGA Implementation of Residue-to-Binary Converters: A Comparison between New CRT-I and MRC Converters for the Moduli Set (2n-1, 2n, 2n+1)

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F11%3APU93978" target="_blank" >RIV/00216305:26220/11:PU93978 - isvavai.cz</a>

Result on the web

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DOI - Digital Object Identifier

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Result language

angličtina

Original language name

FPGA Implementation of Residue-to-Binary Converters: A Comparison between New CRT-I and MRC Converters for the Moduli Set (2n-1, 2n, 2n+1)

Original language description

This paper presents two designs of residue-to-binary converters, namely reverse converters. These designs are based on two well known algorithms for reverse conversion; Mixed-radix conversion (MRC) and the new Chinese remainder theorem 1 (new CRT-I). A comparison is done in order to highlight the differences between the two algorithms when implemented on field programmable gate array FPGA, in terms of time and area consumption. Both converters are dedicated for the moduli set (2n-1, 2n, 2n+1).

Czech name

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Czech description

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Type

J_x - Unclassified - Peer-reviewed scientific article (Jimp, Jsc and Jost)

CEP classification

JA - Electronics and optoelectronics

OECD FORD branch

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Project

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Continuities

Z - Vyzkumny zamer (s odkazem do CEZ)

Publication year

2011

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Name of the periodical

Electronics

ISSN

1313-1842

e-ISSN

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Volume of the periodical

5

Issue of the periodical within the volume

1

Country of publishing house

BG - BULGARIA

Number of pages

4

Pages from-to

11-14

UT code for WoS article

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EID of the result in the Scopus database

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