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New Voltage Mode Universal Filter Based on Promising Structure of Voltage Differencing Buffered Amplifier

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F13%3APU103335" target="_blank" >RIV/00216305:26220/13:PU103335 - isvavai.cz</a>

  • Alternative codes found

    RIV/60162694:G43__/13:00531868

  • Result on the web

    <a href="http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=6530911&url=http%3A%2F%2Fieeexplore.ieee.org%2Fxpls%2Fabs_all.jsp%3Farnumber%3D6530911" target="_blank" >http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=6530911&url=http%3A%2F%2Fieeexplore.ieee.org%2Fxpls%2Fabs_all.jsp%3Farnumber%3D6530911</a>

  • DOI - Digital Object Identifier

Alternative languages

  • Result language

    angličtina

  • Original language name

    New Voltage Mode Universal Filter Based on Promising Structure of Voltage Differencing Buffered Amplifier

  • Original language description

    This paper introduces a promising structure of a new CMOS VDBA (Voltage Differencing Buffered Amplifier) favorable to be applied in VM (Voltage-Mode) applications. Due to the proposed VDBA attributes of high/low input/output impedance and of electronic tunability of its transconductance value, new second-order universal VM filter is designed to take advantage of these characteristics. The filter employs solely of three VDBA as active element together with two capacitors as passive one; capacitors are grounded which is suitable for integrated circuit implementation. Three types of transfer functions are available, namely LP (Low Pass), BP (Band Pass) and HP (High Pass). PSpice simulations using 0.18 um technology of the interior implementation of VDBA, and of the universal filter as well support the validity and practical utility of the entire proposed circuit; As far as the author s knowledge, the implementation of the proposed VDBA has the best attractive results related to a wide range of transconductance tunability, input voltage terminals with very high impedance and voltage output terminal with nearly zero impedance. To show the simulation results of the proposed VDBA, a sufficient number of simulated plots are illustrated in this paper.

  • Czech name

  • Czech description

Classification

  • Type

    D - Article in proceedings

  • CEP classification

  • OECD FORD branch

    20201 - Electrical and electronic engineering

Result continuities

  • Project

    <a href="/en/project/ED2.1.00%2F03.0072" target="_blank" >ED2.1.00/03.0072: Centre of sensor, information and communication systems</a><br>

  • Continuities

    P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Others

  • Publication year

    2013

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Article name in the collection

    IEEE, 23th International Conference Radioelektronika 2013

  • ISBN

    978-1-4673-5517-9

  • ISSN

  • e-ISSN

  • Number of pages

    5

  • Pages from-to

    177-181

  • Publisher name

    IEEE

  • Place of publication

    Pardubice

  • Event location

    Pardubice

  • Event date

    Apr 16, 2013

  • Type of event by nationality

    WRD - Celosvětová akce

  • UT code for WoS article

    000326877900030