Influence of Delay Mismatch on Digital Predistortion for Power Amplifiers
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F13%3APU104173" target="_blank" >RIV/00216305:26220/13:PU104173 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Alternative languages
Result language
angličtina
Original language name
Influence of Delay Mismatch on Digital Predistortion for Power Amplifiers
Original language description
Power amplifier is an essential component in communication systems. Digital baseband predistortion is a cost effective approach to linearize a power amplifier. Linearization of the power amplifiers is done by using a digital predistortion calculated from a pair of time aligned signals. In the indirect approach of calculating the predistortion, these two signals are input and output of the power amplifier converted to baseband. This paper analyzes the influence of the accuracy of the timing of these signals on the performance of the predistorter. We consider the case of an integer and a fractional lag (less than the sampling period). We show that for a predistorter without memory, even for a very small fractional offset degrades performance very significantly. The introduction of memory in the predistorter compensates for the imperfect synchronization. The experiments are performed on data measured on a Doherty power amplifier for UHF DVB-T TV broadcasting. Therefore the method is evaluated on real measured power amplifier.
Czech name
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Czech description
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Classification
Type
D - Article in proceedings
CEP classification
JA - Electronics and optoelectronics
OECD FORD branch
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Result continuities
Project
<a href="/en/project/ED2.1.00%2F03.0072" target="_blank" >ED2.1.00/03.0072: Centre of sensor, information and communication systems</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)<br>S - Specificky vyzkum na vysokych skolach
Others
Publication year
2013
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
20th International Conference Mixed design of integrated circuits and systems MIXDES (2013)
ISBN
978-83-63578-00-8
ISSN
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e-ISSN
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Number of pages
4
Pages from-to
245-248
Publisher name
Neuveden
Place of publication
Gdynia
Event location
Gdynia
Event date
Jun 20, 2013
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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