Comparison of the most utilized low voltage low power techniques

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F13%3APU104294" target="_blank" >RIV/00216305:26220/13:PU104294 - isvavai.cz</a>

Result on the web

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DOI - Digital Object Identifier

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Result language

čeština

Original language name

Comparison of the most utilized low voltage low power techniques

Original language description

The term Low-Voltage LV Low-Power LP has taken a leading role in analog circuit research over the past decade. Such research involves finding promising ways of making the whole analog system work in the LV LP area. Although the effort to reduce the voltage power supply to ever-lower values seems to be endless, the results achieved from LV LP research are still controversial and fiercely debated. The aforementioned controversial results have been coming up since the results achieved are not adequately balanced, i.e. the LV LP requirement can be fulfilled only at the expense of speed and accuracy of the circuit, and vice versa. However, designers should allocate priority to the most important parameters of their designs. Several MOST design techniques exist for LV LP analog circuits. However, only a few of them have found their way in modern designs, for instance, MOSTs operating in the sub-threshold (weak inversion) region, level shifter techniques, self-cascode structures, bulk-driven

Czech name

Comparison of the most utilized low voltage low power techniques

Czech description

The term Low-Voltage LV Low-Power LP has taken a leading role in analog circuit research over the past decade. Such research involves finding promising ways of making the whole analog system work in the LV LP area. Although the effort to reduce the voltage power supply to ever-lower values seems to be endless, the results achieved from LV LP research are still controversial and fiercely debated. The aforementioned controversial results have been coming up since the results achieved are not adequately balanced, i.e. the LV LP requirement can be fulfilled only at the expense of speed and accuracy of the circuit, and vice versa. However, designers should allocate priority to the most important parameters of their designs. Several MOST design techniques exist for LV LP analog circuits. However, only a few of them have found their way in modern designs, for instance, MOSTs operating in the sub-threshold (weak inversion) region, level shifter techniques, self-cascode structures, bulk-driven

Type

D - Article in proceedings

CEP classification

JA - Electronics and optoelectronics

OECD FORD branch

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Project

<a href="/en/project/ED2.1.00%2F03.0072" target="_blank" >ED2.1.00/03.0072: Centre of sensor, information and communication systems</a><br>

Continuities

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Publication year

2013

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection

Electronic Devices and Systems IMAPS CS International Conference 2013

ISBN

978-80-214-4754-7

ISSN

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e-ISSN

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Number of pages

7

Pages from-to

91-97

Publisher name

Neuveden

Place of publication

Brno

Event location

Brno

Event date

Jun 26, 2013

Type of event by nationality

WRD - Celosvětová akce

UT code for WoS article

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