Analysis and Synthesis of Chaotic Circuits Using Memristor Properties
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F14%3APU110370" target="_blank" >RIV/00216305:26220/14:PU110370 - isvavai.cz</a>
Result on the web
<a href="http://dx.doi.org/10.2478/jee-2014-0020" target="_blank" >http://dx.doi.org/10.2478/jee-2014-0020</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.2478/jee-2014-0020" target="_blank" >10.2478/jee-2014-0020</a>
Alternative languages
Result language
angličtina
Original language name
Analysis and Synthesis of Chaotic Circuits Using Memristor Properties
Original language description
This paper provides an innovative practical realization of a memristor based chaotic circuit. The first part discusses the mathematical analysis of the proposed system, including calculation of an eigenvalues, bifurcation diagram and largest Lyapunov exponents. Another parts deal with circuitry realization and the influence of parasitic properties of active elements. The circuit simulations obtained by PSpice environment and the practical measurement results on a breadboard are presented in the last part of this paper. The main aim of this work is an innovative realization of the memristor based chaotic circuit with one type of energy-storage element (linear passive capacitor) and with simpler construction in comparison to other circuits. The next contribution consists in verification of designed circuit with respect to influence of parasitic properties of active elements to chaos destruction.
Czech name
—
Czech description
—
Classification
Type
J<sub>imp</sub> - Article in a specialist periodical, which is included in the Web of Science database
CEP classification
—
OECD FORD branch
20201 - Electrical and electronic engineering
Result continuities
Project
Result was created during the realization of more than one project. More information in the Projects tab.
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)<br>S - Specificky vyzkum na vysokych skolach
Others
Publication year
2014
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Name of the periodical
Journal of Electrical Engineering
ISSN
1335-3632
e-ISSN
1339-309X
Volume of the periodical
2014(65)
Issue of the periodical within the volume
3
Country of publishing house
SK - SLOVAKIA
Number of pages
8
Pages from-to
129-136
UT code for WoS article
000296938700002
EID of the result in the Scopus database
2-s2.0-84901722631