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Memristor model for simulating large circuits for massively-parallel analog computing

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F15%3APU116252" target="_blank" >RIV/00216305:26220/15:PU116252 - isvavai.cz</a>

  • Result on the web

  • DOI - Digital Object Identifier

Alternative languages

  • Result language

    angličtina

  • Original language name

    Memristor model for simulating large circuits for massively-parallel analog computing

  • Original language description

    The model of memristor described in the paper is designed for building models of large networks for analog computations. A circuit containing thousands of memristors for finding the shortest path in a complicated maze is a typical example. The model is designed to meet the following criteria: 1. It is a model of HP memristor with linear dopant drift while respecting the physical bounds of the internal state variable. 2. Reliable operation in the SPICE environment also when simulating extremely large networks. 3. Minimization of the simulation time while computing bias points and during transient analyses. A benchmark circuit for testing the applications of various complexities is presented. The results confirm a perfect operation of the model also in applications containing thousands of memristors.

  • Czech name

  • Czech description

Classification

  • Type

    D - Article in proceedings

  • CEP classification

    JA - Electronics and optoelectronics

  • OECD FORD branch

Result continuities

  • Project

    <a href="/en/project/LD14103" target="_blank" >LD14103: Modeling and Simulation of Mem-Systems</a><br>

  • Continuities

    P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Others

  • Publication year

    2015

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Article name in the collection

    Proceedings of the KIT 2015

  • ISBN

    978-1-61804-245-3

  • ISSN

  • e-ISSN

  • Number of pages

    6

  • Pages from-to

    1-6

  • Publisher name

    AOS L. Mikuláš

  • Place of publication

    L. Mikuláš, Slovensko

  • Event location

    Tatranské Zruby

  • Event date

    Oct 14, 2015

  • Type of event by nationality

    CST - Celostátní akce

  • UT code for WoS article