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Memristor Models for SPICE Simulation of Extremely Large Memristive Networks

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F16%3APU120410" target="_blank" >RIV/00216305:26220/16:PU120410 - isvavai.cz</a>

  • Alternative codes found

    RIV/60162694:G43__/16:00533396

  • Result on the web

    <a href="http://ieeexplore.ieee.org/document/7527252/" target="_blank" >http://ieeexplore.ieee.org/document/7527252/</a>

  • DOI - Digital Object Identifier

    <a href="http://dx.doi.org/10.1109/ISCAS.2016.7527252" target="_blank" >10.1109/ISCAS.2016.7527252</a>

Alternative languages

  • Result language

    angličtina

  • Original language name

    Memristor Models for SPICE Simulation of Extremely Large Memristive Networks

  • Original language description

    In order to avoid non-convergence and other numerical problems associated with the simulation of extremely large memristive networks, suitable models of the individual memristors need to be developed. A circuit containing thousands of memristors for finding the shortest path in a complicated maze is a typical example of a numerically challenging simulation. A benchmark circuit for testing the applications of various complexities is used for the transient analysis. It is shown that various commonly used models, from simple behavioral to Pickett models, require special modifications for minimizing the simulation time and improving the convergence issue.

  • Czech name

  • Czech description

Classification

  • Type

    D - Article in proceedings

  • CEP classification

  • OECD FORD branch

    20201 - Electrical and electronic engineering

Result continuities

  • Project

    Result was created during the realization of more than one project. More information in the Projects tab.

  • Continuities

    P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Others

  • Publication year

    2016

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Article name in the collection

    2016 IEEE International Symposium on Circuits and Systems (ISCAS)

  • ISBN

    978-1-4799-5340-0

  • ISSN

  • e-ISSN

  • Number of pages

    4

  • Pages from-to

    389-392

  • Publisher name

    IEEE

  • Place of publication

    USA

  • Event location

    Montreal

  • Event date

    May 22, 2016

  • Type of event by nationality

    WRD - Celosvětová akce

  • UT code for WoS article

    000390094700098