Supplementary MOS-Only Butterworth LP BP Filter Circuits

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F17%3APU125212" target="_blank" >RIV/00216305:26220/17:PU125212 - isvavai.cz</a>
Result on the web
<a href="https://ieeexplore.ieee.org/document/8292034" target="_blank" >https://ieeexplore.ieee.org/document/8292034</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/ICECS.2017.8292034" target="_blank" >10.1109/ICECS.2017.8292034</a>

Result language
angličtina
Original language name
Supplementary MOS-Only Butterworth LP BP Filter Circuits
Original language description
In this paper, due to the increasing trend in analog design works toward low-voltage low-power applications with demand in increased frequency of operation, the advantages of a recent design technique is emphasized. This technique called MOS-only technique in literature, attracts increased attention due to its inherent potential to overcome many limitation problems. For illustration purpose an application filter design example is given that is a different filter topology compared to its counterparts previously published in the literature.
Czech name
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Czech description
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Project
Result was created during the realization of more than one project. More information in the Projects tab.
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Publication year
2017
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
Proceedings of the 2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
ISBN
978-1-5386-1911-7
ISSN
—
e-ISSN
—
Number of pages
4
Pages from-to
194-197
Publisher name
Institute of Electrical and Electronics Engineers Inc.
Place of publication
Batumi, Georgia
Event location
Batumi
Event date
Dec 5, 2017
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
000426974200045

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