Design and Implementation of a 0.3-V Differential Difference Amplifier
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F19%3APU128368" target="_blank" >RIV/00216305:26220/19:PU128368 - isvavai.cz</a>
Alternative codes found
RIV/68407700:21460/19:00340701
Result on the web
<a href="https://doi.org/10.1109/TCSI.2018.2866179" target="_blank" >https://doi.org/10.1109/TCSI.2018.2866179</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/TCSI.2018.2866179" target="_blank" >10.1109/TCSI.2018.2866179</a>
Alternative languages
Result language
angličtina
Original language name
Design and Implementation of a 0.3-V Differential Difference Amplifier
Original language description
A new silicon realization of an ultra low voltage (LV) and ultra low power (LP) differential-difference amplifier (DDA) is presented in this paper. The circuit combines the idea of non-tailed bulk-driven (BD) differential pairs with a partial positive feedback used for voltage gain boosting. The DDA operates from VDD ranging from 0.3 to 0.5 V. For a 0.3-V version the circuit provides measured DC voltage gain larger than 60 dB, the GBW product of 1.85 kHz, PSRR of 57 dB and the average slew-rate (SR) of 1.55 V/ms at 20 pF load capacitance, while consuming only 22nW of power. An instrumentation amplifier (IA) based on the proposed DDA showed the THD of 0.5 % for Vin=50mVpp, and the 3-dB bandwidth of 750 Hz with the voltage gain of 2 V/V. The circuit has been fabricated in a standard n-well 0.18 um CMOS process from TSMC. Chip test results agree well with simulations. A special design procedure has also been developed that allows the circuit to be optimized under such extreme supply conditions.
Czech name
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Czech description
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Classification
Type
J<sub>imp</sub> - Article in a specialist periodical, which is included in the Web of Science database
CEP classification
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OECD FORD branch
20201 - Electrical and electronic engineering
Result continuities
Project
Result was created during the realization of more than one project. More information in the Projects tab.
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Others
Publication year
2019
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Name of the periodical
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
ISSN
1549-8328
e-ISSN
1558-0806
Volume of the periodical
66
Issue of the periodical within the volume
2, IF: 2.823
Country of publishing house
US - UNITED STATES
Number of pages
11
Pages from-to
513-523
UT code for WoS article
000457357200006
EID of the result in the Scopus database
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