MOS-Only Voltage-Mode All-Pass Filter Core Suitable for IC Design
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F19%3APU132725" target="_blank" >RIV/00216305:26220/19:PU132725 - isvavai.cz</a>
Result on the web
<a href="https://www.sciencedirect.com/science/article/abs/pii/S1434841119309847" target="_blank" >https://www.sciencedirect.com/science/article/abs/pii/S1434841119309847</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1016/j.aeue.2019.152834" target="_blank" >10.1016/j.aeue.2019.152834</a>
Alternative languages
Result language
angličtina
Original language name
MOS-Only Voltage-Mode All-Pass Filter Core Suitable for IC Design
Original language description
In this paper, an area efficient CMOS first-order voltage-mode (VM) all-pass filter (APF) is proposed. The introduced resistorless MOS-only core circuit consists of three transistors only. For the design three transconductances and one gate-to-source capacitance of MOS transistors are sufficient instead of external passive resistors and capacitors, while the full implementation of the VM APF consists of 12 MOS transistors and one grounded capacitor only. Hence, the proposed circuit exhibits important features such as simplicity, permitting reduced chip area when integrated and wide operating frequency range compared to classical analog counterparts that require active elements employing large number of transistors. The theoretical results are in detail verified by numerous post-layout simulations using Cadence IC6 Spectre analog design environment. In the design, medium Vth transistors with 1.8 V supply voltage were used and modeled by the TSMC 180 nm CMOS process parameters available in EUROPRACTICE IC Service design kit. The post-layout simulated pole frequency of the VM APF is 4.825 MHz, the implemented layout including metal-insulator-metal on-chip capacitor occupies an area of 31.1 μm x 39.5 μm, while the total power consumption of the filter is found to be only 92.57 μW.
Czech name
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Czech description
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Classification
Type
J<sub>imp</sub> - Article in a specialist periodical, which is included in the Web of Science database
CEP classification
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OECD FORD branch
20201 - Electrical and electronic engineering
Result continuities
Project
<a href="/en/project/LO1401" target="_blank" >LO1401: Interdisciplinary Research of Wireless Technologies</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Others
Publication year
2019
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Name of the periodical
AEU - International Journal of Electronics and Communications
ISSN
1434-8411
e-ISSN
1618-0399
Volume of the periodical
110
Issue of the periodical within the volume
October
Country of publishing house
DE - GERMANY
Number of pages
7
Pages from-to
1-7
UT code for WoS article
000496999100055
EID of the result in the Scopus database
2-s2.0-85073651075