On reversibility of synchronous counters

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F19%3APU133409" target="_blank" >RIV/00216305:26220/19:PU133409 - isvavai.cz</a>
Result on the web
<a href="http://www.elektrorevue.cz/cz/clanky/power-electronics-1/0/on-reversibility-of-synchronous-counters/" target="_blank" >http://www.elektrorevue.cz/cz/clanky/power-electronics-1/0/on-reversibility-of-synchronous-counters/</a>
DOI - Digital Object Identifier
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Result language
angličtina
Original language name
On reversibility of synchronous counters
Original language description
This paper gathers information about different types of counters, mainly linear feedback shift registers, linear hybrid cellular automaton and binary counters. We explore their capability of being reversed (counting in reverse order) and implementation of counters capable of counting in both directions. In second part different types of counters are compared in required implementation resources when synthetizing for FPGA and also for standard cell library with word width ranging from 3 to 16bits. Selection of more resource optimal counter could leads to ASIC area saving around 20–32 %.
Czech name
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Czech description
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Project
<a href="/en/project/LO1401" target="_blank" >LO1401: Interdisciplinary Research of Wireless Technologies</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Publication year
2019
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Name of the periodical
Elektrorevue - Internetový časopis (http://www.elektrorevue.cz)
ISSN
1213-1539
e-ISSN
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Volume of the periodical
21
Issue of the periodical within the volume
2
Country of publishing house
CZ - CZECH REPUBLIC
Number of pages
8
Pages from-to
54-61
UT code for WoS article
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EID of the result in the Scopus database
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