Design pattern for the runtime model-based checking of a real-time embedded system

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F19%3APU134042" target="_blank" >RIV/00216305:26220/19:PU134042 - isvavai.cz</a>
Result on the web
<a href="https://www.sciencedirect.com/science/article/pii/S240589631932693X" target="_blank" >https://www.sciencedirect.com/science/article/pii/S240589631932693X</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1016/j.ifacol.2019.12.744" target="_blank" >10.1016/j.ifacol.2019.12.744</a>

Result language
angličtina
Original language name
Design pattern for the runtime model-based checking of a real-time embedded system
Original language description
As the safety requirements are becoming increasingly complex, methods and techniques to ensure testing and verification have to be optimized or even newly researched. Runtime verification thus appears to be more promising than offline statistical verification, which faces problems such state explosion and inefficient computational requirements. In this article, a runtime model-based checking monitor is described and implemented. This monitor utilizes the extended Petri net as the model, defined through formal semantics; the Petri net node is implemented by using VHDL. The monitor is assumed to run on an FPGA device connected to a device being tested. The Petri net model is the core of the designed monitor unit and embodies the design of a target application in the form of the design patterns. This approach exploits the model-based architecture concept and adds the runtime checking feature. The purpose of the proposed system is to detect errors such as deadlock, livelock, and starvation in a real-time embedded application. A wider goal or purpose then consists in making the monitor system ready to be incorporated into a fault-tolerant control system. Another goal then is to support the research concerning design patterns as the way to engineer or model safety-critical applications.
Czech name
—
Czech description
—

Project
<a href="/en/project/FV30037" target="_blank" >FV30037: Research and development of new control systems for purchasing platforms.</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)<br>S - Specificky vyzkum na vysokych skolach

Publication year
2019
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
16th IFAC Conference on Programmable Devices and Embedded Systems PDeS 2019
ISBN
—
ISSN
2405-8963
e-ISSN
—
Number of pages
6
Pages from-to
127-132
Publisher name
Neuveden
Place of publication
Neuveden
Event location
Tatranská lomnica
Event date
Oct 29, 2019
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
000507495200022

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