Analog Multipliers-Based Double Output Voltage Phase Detector for Low-Frequency Demodulation of Frequency Modulated Signals

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F21%3APU141287" target="_blank" >RIV/00216305:26220/21:PU141287 - isvavai.cz</a>
Result on the web
<a href="https://ieeexplore.ieee.org/document/9465156" target="_blank" >https://ieeexplore.ieee.org/document/9465156</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/ACCESS.2021.3092525" target="_blank" >10.1109/ACCESS.2021.3092525</a>

Result language
angličtina
Original language name
Analog Multipliers-Based Double Output Voltage Phase Detector for Low-Frequency Demodulation of Frequency Modulated Signals
Original language description
This work deals with the design of a simple double output voltage phase detector, using a specific type of analog multiplier, and its application in a frequency demodulator. The design of active parts was performed in Taiwan Semiconductor Manufacturing Company (TSMC) 0.18 mu m 1.8 V CMOS technology. The intention is devoted to design the circuitry in such a way to avoid low-frequency signal processing with large values of capacities that are not available in case of on-chip implementation. The idea consists in the processing of significantly faster signal (tens of kHz) carrying modulated low frequency information. Then the coupling capacity may have significantly smaller value. The operation of the demodulator was tested for carrier frequency 50 kHz and for modulation signal with frequency of 10 Hz and 500 Hz. Differences of these frequencies approximately determine the values of capacitors required for AC coupling. Simulations (Cadence Spectre simulator) as well as experimental measurement, using fabricated ASIC prototypes, are provided to verify the proposed circuits in both the time and frequency domain.
Czech name
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Czech description
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Type
J<sub>imp</sub> - Article in a specialist periodical, which is included in the Web of Science database
CEP classification
—
OECD FORD branch
20201 - Electrical and electronic engineering

Project
<a href="/en/project/GA19-22248S" target="_blank" >GA19-22248S: Deterministic, chaotic and stochastic phenomena in the sub-micron integrated structures</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Publication year
2021
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

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