0.5 V Differential Difference Transconductance Amplifier and Its Application in Voltage-Mode Universal Filter
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F22%3APU144492" target="_blank" >RIV/00216305:26220/22:PU144492 - isvavai.cz</a>
Alternative codes found
RIV/60162694:G43__/23:00558009 RIV/68407700:21460/22:00358012
Result on the web
<a href="https://ieeexplore.ieee.org/document/9758712" target="_blank" >https://ieeexplore.ieee.org/document/9758712</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/ACCESS.2022.3167700" target="_blank" >10.1109/ACCESS.2022.3167700</a>
Alternative languages
Result language
angličtina
Original language name
0.5 V Differential Difference Transconductance Amplifier and Its Application in Voltage-Mode Universal Filter
Original language description
This paper presents an innovative CMOS structure for Differential Difference Transconductance Amplifiers (DDTA). While the circuit operates under extremely low voltage supply 0.5 V, the circuit's performance is improved thanks to using the multiple-input MOS transistor (MI-MOST), the bulk-driven, self-cascode and partial positive feedback (PPF) techniques. As a result, the DDTA structure is less complex, with high gain of 93 dB, wide input voltage range nearly rail-to-rail, and wide transconductance tunability. As an example of application, a second-order voltage-mode universal filter using three DDTAs and two 6 pF integrated capacitors is presented. The filter is designed such that no matching conditions are required for the input and passive components, and the input signals need not be inverted. The natural frequency and the quality factor can be set orthogonally while the natural frequency can be electronically controlled. The circuit was designed and simulated in Cadence environment using 0.18 mu m TSMC technology. The simulation results including intensive Monte-Carlo (MC) and process, temperature, voltage (PVT) analysis confirm the stability and the robustness of the design to process, mismatch variation and PVT corners.
Czech name
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Czech description
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Classification
Type
J<sub>imp</sub> - Article in a specialist periodical, which is included in the Web of Science database
CEP classification
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OECD FORD branch
20201 - Electrical and electronic engineering
Result continuities
Project
—
Continuities
S - Specificky vyzkum na vysokych skolach
Others
Publication year
2022
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Name of the periodical
IEEE Access
ISSN
2169-3536
e-ISSN
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Volume of the periodical
10
Issue of the periodical within the volume
1
Country of publishing house
US - UNITED STATES
Number of pages
12
Pages from-to
43209-43220
UT code for WoS article
000788981700001
EID of the result in the Scopus database
2-s2.0-85129147470