FPGA Digital Circuit for up to 400 Gbps Transfers over Ethernet
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F22%3APU150912" target="_blank" >RIV/00216305:26220/22:PU150912 - isvavai.cz</a>
Result on the web
<a href="https://www.eeict.cz/eeict_download/archiv/sborniky/EEICT_2022_sbornik_1_v2.pdf" target="_blank" >https://www.eeict.cz/eeict_download/archiv/sborniky/EEICT_2022_sbornik_1_v2.pdf</a>
DOI - Digital Object Identifier
—
Alternative languages
Result language
angličtina
Original language name
FPGA Digital Circuit for up to 400 Gbps Transfers over Ethernet
Original language description
Network cards with a hardware acceleration feature are a popular solution for meeting the ever-increasing demands for throughput in high-speed networks. Utilizing the FPGA (Field Programmable Gate Array) chips as the hardware acceleration elements, this paper presents a generic and highly modular digital circuit for FPGA that manages the transfer of data in form of Ethernet frames at rates reaching up to 400 Gbps. To achieve this, the proposed digital circuit takes advantage of the Ethernet intellectual property (IP) blocks in high-end FPGAs from Intel. By first implementing and fine-tuning it for data rates up to 100 Gbps, the next step is expanding it to reach data rates up to 400 Gbps. The created digital circuit will then be used in the FPGA design for the XpressSX AGI-FH400G network card (among others) created by companies CESNET a.l.e and REFLEX CES. Even though the target data rate is 400 Gbps, this paper focuses on the first step, which is the utilization of the Intel Ethernet hard IP blocks to reach 100 Gbps.
Czech name
—
Czech description
—
Classification
Type
D - Article in proceedings
CEP classification
—
OECD FORD branch
20200 - Electrical engineering, Electronic engineering, Information engineering
Result continuities
Project
—
Continuities
I - Institucionalni podpora na dlouhodoby koncepcni rozvoj vyzkumne organizace
Others
Publication year
2022
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
Proceedings I of the 28th Conference STUDENT EEICT 2022
ISBN
978-80-214-6029-4
ISSN
—
e-ISSN
—
Number of pages
4
Pages from-to
303-306
Publisher name
Brno University of Technology, Faculty of Electrical Engineering and Communication
Place of publication
Brno
Event location
Brno
Event date
Apr 26, 2022
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
—