A New Method to Synthesise the Sinusoidal Oscillator Based on Series Negative Resistance-Capacitance and its Implementation Using a Single Commercial IC, LT1228
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F23%3APU148840" target="_blank" >RIV/00216305:26220/23:PU148840 - isvavai.cz</a>
Result on the web
<a href="https://www.eejournal.ktu.lt/index.php/elt/article/view/33844" target="_blank" >https://www.eejournal.ktu.lt/index.php/elt/article/view/33844</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.5755/j02.eie.33844" target="_blank" >10.5755/j02.eie.33844</a>
Alternative languages
Result language
angličtina
Original language name
A New Method to Synthesise the Sinusoidal Oscillator Based on Series Negative Resistance-Capacitance and its Implementation Using a Single Commercial IC, LT1228
Original language description
alternative method for synthesising the sinusoidal oscillator based on series negative resistance capacitance is presented in this paper. The proposed topology is constructed with the series negative resistance-capacitance circuit connected in parallel with a grounded resistor and capacitor. To validate the proposed method, a new grounded series negative resistance-capacitance simulator is also proposed as a subcircuit for synthesising the sinusoidal oscillator. The series negative resistance-capacitance simulator is based on a commercially available integrated circuit (IC), LT1228. The equivalent negative resistance and equivalent negative capacitance can be adjusted electronically using an external DC bias current. The sinusoidal oscillator that is synthesised using the proposed method consists of a single LT1228, two capacitors, and three resistors. The frequency and the condition of the oscillation are orthogonally adjusted. Also, the condition of oscillation is electronically controlled. The amplitude of the sinusoidal waveform is adjustable. In addition, the output voltage node of the proposed oscillator has a low impedance, which allows it to connect to other circuits without using an additional buffer. Both PSPICE simulation and experiment are used to validate the proposed circuits.
Czech name
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Czech description
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Classification
Type
J<sub>imp</sub> - Article in a specialist periodical, which is included in the Web of Science database
CEP classification
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OECD FORD branch
20200 - Electrical engineering, Electronic engineering, Information engineering
Result continuities
Project
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Continuities
S - Specificky vyzkum na vysokych skolach
Others
Publication year
2023
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Name of the periodical
Elektronika Ir Elektrotechnika
ISSN
1392-1215
e-ISSN
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Volume of the periodical
29
Issue of the periodical within the volume
3
Country of publishing house
LT - LITHUANIA
Number of pages
7
Pages from-to
26-32
UT code for WoS article
001039465800004
EID of the result in the Scopus database
2-s2.0-85167665077