Lattice-based Multisignature Optimization for RAM Constrained Devices
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F24%3APU151834" target="_blank" >RIV/00216305:26220/24:PU151834 - isvavai.cz</a>
Result on the web
<a href="https://dl.acm.org/doi/10.1145/3664476.3670461" target="_blank" >https://dl.acm.org/doi/10.1145/3664476.3670461</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1145/3664476.3670461" target="_blank" >10.1145/3664476.3670461</a>
Alternative languages
Result language
angličtina
Original language name
Lattice-based Multisignature Optimization for RAM Constrained Devices
Original language description
In the era of growing threats posed by the development of quantum computers, ensuring the security of electronic services has become fundamental. The ongoing standardization process led by the National Institute of Standards and Technology (NIST) emphasizes the necessity for quantum-resistant security measures. However, the implementation of Post-Quantum Cryptographic (PQC) schemes, including advanced schemes such as threshold signatures, faces challenges due to their large key sizes and high computational complexity, particularly on constrained devices. This paper introduces two microcontroller-tailored optimization approaches, focusing on enhancing the DS2 threshold signature scheme. These optimizations aim to reduce memory consumption while maintaining security strength, specifically enabling the implementation of DS2 on microcontrollers with only 192 KB of RAM. Experimental results and security analysis demonstrate the efficacy and practicality of our solution, facilitating the deployment of DS2 threshold signatures on resource-constrained microcontrollers.
Czech name
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Czech description
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Classification
Type
D - Article in proceedings
CEP classification
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OECD FORD branch
10201 - Computer sciences, information science, bioinformathics (hardware development to be 2.2, social aspect to be 5.8)
Result continuities
Project
<a href="/en/project/VJ03030014" target="_blank" >VJ03030014: Development of International Collaboration in Cryptography and Cybersecurity Research</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Others
Publication year
2024
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
ARES '24: Proceedings of the 19th International Conference on Availability, Reliability and Security
ISBN
979-8-4007-1718-5
ISSN
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e-ISSN
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Number of pages
10
Pages from-to
1-10
Publisher name
Association for Computing Machinery
Place of publication
neuveden
Event location
Vídeň
Event date
Jul 30, 2024
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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