A 0.3-V 62-dB Bulk-Driven OTA With Hybrid Frequency Compensation in 65 nm CMOS

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F26%3A0200116" target="_blank" >RIV/00216305:26220/26:0200116 - isvavai.cz</a>
Result on the web
<a href="https://doi.org/10.1002/cta.70196" target="_blank" >https://doi.org/10.1002/cta.70196</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1002/cta.70196" target="_blank" >10.1002/cta.70196</a>

Result language
angličtina
Original language name
A 0.3-V 62-dB Bulk-Driven OTA With Hybrid Frequency Compensation in 65 nm CMOS
Original language description
This paper presents a novel 65-nm CMOS ultra-low-voltage (ULV) operational transconductance amplifier (OTA) design. The proposed architecture integrates partial positive feedback (PPF) with a hybrid frequency compensation technique that combines current-buffer and Miller compensation approaches. This hybrid compensation effectively mitigates the primary limitation of PPF-based OTAs, that is, their sensitivity to transistor mismatch. Operating at a supply voltage of 0.3 V and consuming just 23.7 nW of power, the two-stage OTA achieves a rail-to-rail input common-mode range, a DC voltage gain of 61.7 dB, and a gain-bandwidth product of 12.7 kHz with a 20-pF load capacitance.
Czech name
—
Czech description
—

Type
J<sub>imp</sub> - Article in a specialist periodical, which is included in the Web of Science database
CEP classification
—
OECD FORD branch
20201 - Electrical and electronic engineering

Publication year
2026
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Similar results(10)