Executable System-Level Specifications of HW/SW Architecture for Embedded Multiprocessor Systems

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F02%3APU36185" target="_blank" >RIV/00216305:26230/02:PU36185 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Result language
angličtina
Original language name
Executable System-Level Specifications of HW/SW Architecture for Embedded Multiprocessor Systems
Original language description
The paper addresses the problem of preliminary system level modeling and simulation of parallel, embedded applications oriented to performance estimation. A CSP-based simulation tool Transim, originally intended for simulating message-passing architectures, proved to be very useful in quest for optimum HW/SW architectures in much wider area of applications. Particularly, it has been retargeted for shared memory architectures with a bus. Processing of a formal description of a system architecture, communnication as well as software modules and their mapping onto hardware leads directly to performance figures. The technique is demonstrated on the generic hybrid pipeline/farm architecture suitable for embedded tasks and on a small cluster of SMPs.
Czech name
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Czech description
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Project
<a href="/en/project/GA102%2F02%2F0503" target="_blank" >GA102/02/0503: Parallel performance prediction and tuning</a><br>
Continuities
Z - Vyzkumny zamer (s odkazem do CEZ)

Publication year
2002
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
Proceedings of the Joint Workshop on Formal Specifications of Computer-Based Systems, 2002
ISBN
1-85769-169-5
ISSN
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e-ISSN
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Number of pages
6
Pages from-to
65-70
Publisher name
University of Stirling
Place of publication
Stirling
Event location
Lund
Event date
Apr 8, 2002
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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