The Formal Approach to the RTL Test Application Problem Using Petri Nets

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F02%3APU36214" target="_blank" >RIV/00216305:26230/02:PU36214 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Result language
angličtina
Original language name
The Formal Approach to the RTL Test Application Problem Using Petri Nets
Original language description
An approach to solve the test application problem is presented. On the basis of RT-level digital circuit formal model, properties of circuit elements, which are important for test controller synthesis, are discussed. Algorithm to extract such informationfrom the model of the circuit and algorithm to create a model of test application to the selected circuit element are presented. To evaluate the relevance of given path for diagnostic data and possibility of parallelism, Petri Nets concept is used.
Czech name
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Czech description
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Project
<a href="/en/project/GA102%2F01%2F1531" target="_blank" >GA102/01/1531: Formal approaches in digital circuit diagnostics - testable design verification</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Publication year
2002
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
Proceedings of IEEE Design and Diagnostics of Electronic Circuits and Systems 2002
ISBN
80-214-2094-4
ISSN
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e-ISSN
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Number of pages
9
Pages from-to
78-86
Publisher name
Faculty of Information Technology BUT
Place of publication
Brno
Event location
Brno
Event date
Apr 17, 2002
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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