A Methodology for Designing Communication Architectures for Multiprocessor SoCs
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F03%3APU42559" target="_blank" >RIV/00216305:26230/03:PU42559 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Alternative languages
Result language
angličtina
Original language name
A Methodology for Designing Communication Architectures for Multiprocessor SoCs
Original language description
Multiprocessor SoCs (MSoCs) for network and stream processing have to cope with growing speed and flexibility requirements of new complex packet processing tasks. Performance optimization of a homogenous network of CPUs in a certain application leads basically to optimization of CPUs interconnect and communication algorithms. Several on-chip communication architectures are compared with respect to their cost, simplicity of routing algorithms, and performance in collective communications. It is shown, thhat if group communication patterns are considered in certain proportions, the fat cube architecture rather than Octagonal architecture may have the best performance/cost figure. A methodology for designing efficient on-chip interconnects on regular group communication patterns is suggested. It may be useful if the system is targeted for specific class of applications.
Czech name
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Czech description
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Classification
Type
D - Article in proceedings
CEP classification
JC - Computer hardware and software
OECD FORD branch
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Result continuities
Project
<a href="/en/project/GA102%2F02%2F0503" target="_blank" >GA102/02/0503: Parallel performance prediction and tuning</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Others
Publication year
2003
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
Proceedings EUROMICRO Symposium on Digital System Design - Architectures, Methods and Tools DSD 2003
ISBN
0-7695-2003-0
ISSN
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e-ISSN
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Number of pages
4
Pages from-to
455-458
Publisher name
IEEE Computer Society
Place of publication
Belek
Event location
Belek
Event date
Sep 2, 2003
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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