Recognizing Speed Limit Sign Numbers by Evolvable Hardware

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F04%3APU49202" target="_blank" >RIV/00216305:26230/04:PU49202 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Result language
angličtina
Original language name
Recognizing Speed Limit Sign Numbers by Evolvable Hardware
Original language description
An automatic traffic sign detection system would be important in a driver assistance system. In this paper, an approach for detecting numbers on speed limit signs is proposed. Such a system would have to provide a high recognition performance in real-time. Thus, in this paper we propose to apply evolvable hardware for the classification of the numbers extracted from images. The system is based on incremental evolution of digital logic gates. Experiments show that this is a very efficient approach.
Czech name
Evolvable hardware pro rozpoznávání rychlostních limitů na dopravních značkách
Czech description
Článek popisuje využití vyvíjejících se obvodů pro klasifikaci čísel z obrázků dopravních značek. Metoda je založena na principu inkrementální evoluce.

Project
<a href="/en/project/GP102%2F03%2FP004" target="_blank" >GP102/03/P004: Evolvable hardware based applications design methods</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Publication year
2004
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
Proc. of the 8th Int. Conf. on Parallel Problem Solving from Nature (PPSN VIII)
ISBN
3540230920
ISSN
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e-ISSN
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Number of pages
10
Pages from-to
682-691
Publisher name
Springer Verlag
Place of publication
Berlin
Event location
Birmingham
Event date
Sep 18, 2004
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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