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Methodology of Selecting Scan-Based Testability Improving Technique

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F05%3APU55724" target="_blank" >RIV/00216305:26230/05:PU55724 - isvavai.cz</a>

  • Result on the web

  • DOI - Digital Object Identifier

Alternative languages

  • Result language

    angličtina

  • Original language name

    Methodology of Selecting Scan-Based Testability Improving Technique

  • Original language description

    In the paper, the solution of the problem of selecting the most optimal design-for-testability technique for register-transfer level digital circuits is demonstrated. A decision-making process that is able to solve the problem over a set of scan-based techniques is presented in the paper. The process decides among following testability improving techniques: identification of testable cores, covering of feedback loops by minimum set of scan registers, selection of registers into scan chains to achieve hiigh level of parallelism during the test application.

  • Czech name

    Methodology of Selecting Scan-Based Testability Improving Technique

  • Czech description

    Příspěvek se zabývá problémem výběru vhodné množiny registrů do řetězce scan. Proces výběru prezentovaný v příspěvku je založen na technikách identifikace testovatelných jader, pokrytí zpětnovazebních smyček a výběru vhodných registrů pro dosažení vysokého paralelismu testu.

Classification

  • Type

    D - Article in proceedings

  • CEP classification

    JC - Computer hardware and software

  • OECD FORD branch

Result continuities

  • Project

    <a href="/en/project/GA102%2F04%2F0737" target="_blank" >GA102/04/0737: Modern methods of digital system synthesis</a><br>

  • Continuities

    P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Others

  • Publication year

    2005

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Article name in the collection

    Proc. of 8th IEEE Design and Diagnostic of Electronic Circuits and Systems Workshop

  • ISBN

    963-9364-48-7

  • ISSN

  • e-ISSN

  • Number of pages

    4

  • Pages from-to

    186-189

  • Publisher name

    University of West Hungary

  • Place of publication

    Sopron

  • Event location

    Sopron

  • Event date

    Apr 13, 2005

  • Type of event by nationality

    WRD - Celosvětová akce

  • UT code for WoS article