Towards Automatic Design of Competitive Image Filters in FPGAs

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F08%3APU78070" target="_blank" >RIV/00216305:26230/08:PU78070 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Result language
angličtina
Original language name
Towards Automatic Design of Competitive Image Filters in FPGAs
Original language description
This paper presents a new approach to the FPGA implementation of image filters which are utilized to remove the salt and pepper noise of high intensity. An evolutionary algorithm (EA) is utilized to find a set of image filters which can be employed in abank of image filters. The main advantage of this approach is that the bank of evolutionary designed filters requires four times less resources on a chip in comparison with the adaptive median filter while the visual quality of filtering is preserved. The proposed solution also exhibits a very good behavior for the impulse bursts noise. In order to design image filters in reasonable time, an FPGA-based evolutionary platform is utilized. The proposed platform is based on the implementation of a search algorithm in the PowerPC processor which is available in Xilinx Virtex II Pro and newer FPGAs. As the search algorithm as well as the evaluation of candidate solution runs in FPGA, the evolutionary design o
Czech name
Automatizovaný návrh filtrů v FPGA
Czech description
Článek prezentuje nový přístup k FPGA implementaci obrazových filtrů využívající evoluční design.

Publication year
2008
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

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