Framework for Formal Verification of Clock Domain Crossing

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F10%3APR25258" target="_blank" >RIV/00216305:26230/10:PR25258 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Result language
angličtina
Original language name
Framework for Formal Verification of Clock Domain Crossing
Original language description
Conventional technique of hardware design formal verification is based on modelling zero-delay changes of signal value. Unfortunatelly, this type of abstraction hides the problem of clock domain crossings (CDCs) which cause is either in metastability orin a synchronization protocol design. CDCreloaded is a framework which gathers all one need for formal verification and analysis of hardware designs including asynchronous components. The framework consists of several components including (i) the tool cdcreveal for detection and extending of parts of a design prone to CDC problems, (ii) the tool envgen for generating an environment of a verified component, and (iii) the tool for niCE for building a filtered content of a counter-example to make the analysis of a discovered fault easier for a QA engineer.
Czech name
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Czech description
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Project
<a href="/en/project/GAP103%2F10%2F0306" target="_blank" >GAP103/10/0306: Static and Dynamic Verification of Programs with Advanced Features of Concurrency and Unboundedness</a><br>
Continuities
Z - Vyzkumny zamer (s odkazem do CEZ)

Publication year
2010
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Internal product ID
cdcreloaded
Technical parameters
Volně šiřitelný software poskytovaný pod licencí GNU GPL v3, její znění je na http://www.gnu.org/licenses/gpl-3.0.txt. Čtyři nástroje v objektově-orientovaném návrhu v jazyku Python (verze vyšší nebo rovno 2.5 a nižší než 3.0) s ot
Economical parameters
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Owner IČO
00216305
Owner name
Vysoké učení technické v Brně

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