A Global Postsynthesis Optimization Method for Combinational Circuits

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F11%3APU95996" target="_blank" >RIV/00216305:26230/11:PU95996 - isvavai.cz</a>
Result on the web
—
DOI - Digital Object Identifier
—

Result language
angličtina
Original language name
A Global Postsynthesis Optimization Method for Combinational Circuits
Original language description
A genetic programming-based circuit synthesis method is proposed that enables to globally optimize the number of gates in circuits that have already been synthesized using common methods such as ABC and SIS. The main contribution is a proposal for a newfitness function that enables to significantly reduce the fitness evaluation time in comparison to the state of the art. The fitness function performs optimized equivalence checking using a SAT solver. It is shown that the equivalence checking time can significantly be reduced when knowledge of the parent circuit and its mutated offspring is taken into account. For a cost of a runtime, results of conventional synthesis conducted using SIS and ABC were improved by 20-40% for the LGSynth93 benchmarks.
Czech name
—
Czech description
—

Project
<a href="/en/project/GAP103%2F10%2F1517" target="_blank" >GAP103/10/1517: Natural Computing on Unconventional Platforms</a><br>
Continuities
Z - Vyzkumny zamer (s odkazem do CEZ)

Publication year
2011
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
Proc. of the Design, Automation and Test in Europe DATE 2011
ISBN
978-3-9810801-7-9
ISSN
—
e-ISSN
—
Number of pages
4
Pages from-to
1525-1528
Publisher name
European Design and Automation Association
Place of publication
Grenoble
Event location
Grenoble
Event date
Mar 14, 2011
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
—

Similar results(10)