Using Formal Verification of Parameterized Systems in RAW Hazard Analysis in Microprocessors
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F14%3APU116937" target="_blank" >RIV/00216305:26230/14:PU116937 - isvavai.cz</a>
Result on the web
<a href="http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7087240" target="_blank" >http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7087240</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/MTV.2014.21" target="_blank" >10.1109/MTV.2014.21</a>
Alternative languages
Result language
angličtina
Original language name
Using Formal Verification of Parameterized Systems in RAW Hazard Analysis in Microprocessors
Original language description
Implementation of a pipeline-based execution of instructions in purpose-specific microprocessors is an error prone task, which implies a need of proper verification of the resulting design. Various techniques were proposed for this purpose, but they usually require a significant manual intervention of the developers. In this work, we propose a novel, highly automated approach for discovering RAW hazards in in-order pipelined instruction execution. Our approach combines static analysis of data paths to detect anomalies and possible hazards, followed by a transformation of detected problematic paths to a parameterised system, and a subsequent formal verification to check the possibility of unhandled hazards using techniques for formal verification of parameterised systems. We have implemented our approach and successfully applied it on multiple non-trivial microprocessors.
Czech name
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Czech description
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Classification
Type
D - Article in proceedings
CEP classification
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OECD FORD branch
20206 - Computer hardware and architecture
Result continuities
Project
Result was created during the realization of more than one project. More information in the Projects tab.
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Others
Publication year
2014
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
Proceedings of 15th International Workshop on Microprocessor Test and Verification (MTV 2014)
ISBN
978-1-4673-6858-2
ISSN
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e-ISSN
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Number of pages
7
Pages from-to
83-89
Publisher name
IEEE Computer Society
Place of publication
Austin, TX
Event location
Austin, TX
Event date
Dec 15, 2014
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
000380373200017