Functional Verification Based Platform for Evaluating Fault Tolerance Properties

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F17%3APU126382" target="_blank" >RIV/00216305:26230/17:PU126382 - isvavai.cz</a>

Result on the web

<a href="http://www.sciencedirect.com/science/article/pii/S0141933117300200" target="_blank" >http://www.sciencedirect.com/science/article/pii/S0141933117300200</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1016/j.micpro.2017.06.004" target="_blank" >10.1016/j.micpro.2017.06.004</a>

Result language

angličtina

Original language name

Functional Verification Based Platform for Evaluating Fault Tolerance Properties

Original language description

The fundamental topic of this article is the interconnection of simulation-based functional verification, which is standardly used for removing design errors from simulated hardware systems, with fault-tolerant mechanisms that serve for hardening electro-mechanical FPGA SRAM-based systems against faults. For this purpose, an evaluation platform that connects these two approaches was designed and tested for one particular casestudy: a robot that moves through a maze (its electronic part is the robot controller and the mechanical part is the robot itself). However, in order to make the evaluation platform generally applicable for various electro-mechanical systems, several subtopics and sub-problems need to solved. For example, the electronic controller can have several representations (hard-coded, processor based, neural-network based) and for each option, extendability of verification environment must be possible. Furthermore, in order to check complex behavior of verified systems, different verification scenarios must be prepared and this is the role of random generators or effective regression tests scenarios. Also, despite the transfer of the controller to the SRAM-based FPGA which was solved together with an injection of artificial faults, many more experiments must be done in order to create a sufficient fault-tolerant methodology that indicates how a general electronic controller can be hardened against faults by different fault-tolerant mechanisms in order to make it reliable enough in the real environment. All these additional topics are presented in this article together with some side experiments that led to their integration into the evaluation platform.

Czech name

—

Czech description

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Type

J_imp - Article in a specialist periodical, which is included in the Web of Science database

CEP classification

—

OECD FORD branch

20206 - Computer hardware and architecture

Project

Result was created during the realization of more than one project. More information in the Projects tab.

Continuities

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)<br>S - Specificky vyzkum na vysokych skolach

Publication year

2017

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Name of the periodical

Microprocessors and Microsystems

ISSN

0141-9331

e-ISSN

1872-9436

Volume of the periodical

52

Issue of the periodical within the volume

5

Country of publishing house

NL - THE KINGDOM OF THE NETHERLANDS

Number of pages

15

Pages from-to

145-159

UT code for WoS article

000407984000013

EID of the result in the Scopus database

2-s2.0-85020644987