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Fast Reconfigurable Hash Functions for Network Flow Hashing in FPGAs

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F18%3APU130723" target="_blank" >RIV/00216305:26230/18:PU130723 - isvavai.cz</a>

  • Result on the web

    <a href="http://www.fit.vutbr.cz/research/pubs/all.php?id=11706" target="_blank" >http://www.fit.vutbr.cz/research/pubs/all.php?id=11706</a>

  • DOI - Digital Object Identifier

    <a href="http://dx.doi.org/10.1109/AHS.2018.8541401" target="_blank" >10.1109/AHS.2018.8541401</a>

Alternative languages

  • Result language

    angličtina

  • Original language name

    Fast Reconfigurable Hash Functions for Network Flow Hashing in FPGAs

  • Original language description

    Efficient monitoring of high speed computer networks operating with a 100 Gigabit per second (Gbps) data throughput requires a suitable hardware acceleration of its key components. We present a platform capable of automated design of hash functions suitable for network flow hashing. The platform employs a multi-objective linear genetic programming developed for the hash function design. We evolved high-quality hash functions and implemented them in a field programmable gate array (FPGA). Several evolved hash functions were combined together in order to form a new reconfigurable hash function. The proposed reconfigurable design significantly reduces the area on a chip while the maximum operation frequency remains very close to the fastest hash functions. Properties of evolved hash functions were compared with the state-of-the-art hash functions in terms of the quality of hashing, area and operation frequency in the FPGA.

  • Czech name

  • Czech description

Classification

  • Type

    D - Article in proceedings

  • CEP classification

  • OECD FORD branch

    20206 - Computer hardware and architecture

Result continuities

  • Project

    <a href="/en/project/LTC18053" target="_blank" >LTC18053: Advanced Methods of Nature-Inspired Optimisation and HPC Implementation for the Real-Life Applications</a><br>

  • Continuities

    P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Others

  • Publication year

    2018

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Article name in the collection

    Proceedings of the 2018 NASA/ESA Conference on Adaptive Hardware and Systems

  • ISBN

    978-1-5386-7753-7

  • ISSN

  • e-ISSN

  • Number of pages

    7

  • Pages from-to

    257-263

  • Publisher name

    Institute of Electrical and Electronics Engineers

  • Place of publication

    Edinburgh

  • Event location

    Edinbugh

  • Event date

    Aug 6, 2018

  • Type of event by nationality

    WRD - Celosvětová akce

  • UT code for WoS article