FT-EST Framework: Reliability Estimation for the Purposes of Fault-Tolerant Systems Design Automation

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F18%3APU130724" target="_blank" >RIV/00216305:26230/18:PU130724 - isvavai.cz</a>
Result on the web
<a href="https://www.fit.vut.cz/research/publication/11707/" target="_blank" >https://www.fit.vut.cz/research/publication/11707/</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/DSD.2018.00053" target="_blank" >10.1109/DSD.2018.00053</a>

Result language
angličtina
Original language name
FT-EST Framework: Reliability Estimation for the Purposes of Fault-Tolerant Systems Design Automation
Original language description
The complexity of today's systems is growing along with the level of chip integration. This results in higher demand for reliability techniques; it also increases the difficulty of incorporating reliability in such systems. For this purpose, we are working on a method to automate reliability insertion; however, for this method, it is necessary to have feedback on the result. In this paper, one component of the automation flow enabling the estimation of the resulting reliability - Fault Tolerance ESTimation (FT-EST) framework - is presented along with an improvement for accelerating the time necessary to reach the estimation. For the purpose of evaluation, we are using our Redundant Data Types approach, which enables us to intentionally insert reliability in a particular operation. The estimation utilizes the concept of fault injection. The results indicate, that the concept of Redundant Data Types is functional, however, also suggest its future improvements (e.g. for the operation of subtraction).
Czech name
—
Czech description
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Project
<a href="/en/project/LQ1602" target="_blank" >LQ1602: IT4Innovations excellence in science</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)<br>S - Specificky vyzkum na vysokych skolach

Publication year
2018
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
Proceedings of the 2018 21st Euromicro Conference on Digital System Design
ISBN
978-1-5386-7376-8
ISSN
—
e-ISSN
—
Number of pages
8
Pages from-to
244-251
Publisher name
IEEE Computer Society
Place of publication
Praha
Event location
FIT ČVUT, Thákurova 9, 160 00 Praha 6
Event date
Aug 29, 2018
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
000537466600037

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