Input and Output Generation for the Verification of ALU: a Use Case

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F18%3APU130789" target="_blank" >RIV/00216305:26230/18:PU130789 - isvavai.cz</a>
Result on the web
<a href="https://www.fit.vut.cz/research/publication/11833/" target="_blank" >https://www.fit.vut.cz/research/publication/11833/</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/EWDTS.2018.8524641" target="_blank" >10.1109/EWDTS.2018.8524641</a>

Result language
angličtina
Original language name
Input and Output Generation for the Verification of ALU: a Use Case
Original language description
The paper presents the approach to universal stimuli generation for an arithmetic-logic unit (ALU). It is not focused only on input data generation, but it is possible to generate also expected output in one stimulus. The process of generation is based on a probabilistic constrained grammar which is designed to universally describe stimuli for various circuits. This grammar is processed by our framework. The experiment in functional verification, which shows the quality of generated stimuli, is also presented.
Czech name
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Czech description
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Project
Result was created during the realization of more than one project. More information in the Projects tab.
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)<br>S - Specificky vyzkum na vysokych skolach

Publication year
2018
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
Proceedings of 2018 IEEE East-West Design and Test Symposium, EWDTS 2018
ISBN
978-1-5386-5710-2
ISSN
—
e-ISSN
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Number of pages
6
Pages from-to
331-336
Publisher name
IEEE Computer Society
Place of publication
Kazan
Event location
Kazan, Rusko
Event date
Sep 14, 2018
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
000517795800024

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