Automated Search-Based Functional Approximation for Digital Circuits
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F19%3APU130707" target="_blank" >RIV/00216305:26230/19:PU130707 - isvavai.cz</a>
Result on the web
<a href="https://www.fit.vut.cz/research/publication/11679/" target="_blank" >https://www.fit.vut.cz/research/publication/11679/</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1007/978-3-319-99322-5_9" target="_blank" >10.1007/978-3-319-99322-5_9</a>
Alternative languages
Result language
angličtina
Original language name
Automated Search-Based Functional Approximation for Digital Circuits
Original language description
The problem of developing an approximate implementation of a given combinational circuit can be formulated as a multi-objective design problem and solved by means of a search algorithm. This approach usually provides many solutions showing high-quality tradeoffs between key design objectives; however, it is very computationally expensive. This chapter presents a general-purpose method based on genetic programming for an automated functional approximation of combinational circuits at the gate and register-transfer levels. It surveys relevant error metrics and circuit parameters that are typically optimized by genetic programming. A special attention is given to the techniques capable of providing formal guarantees in terms of error bounds and accelerating the search process. Case studies dealing with approximate implementations of arithmetic circuits and image operators are presented to highlight the quality of results obtained by the search-based functional approximation in completely different application domains.
Czech name
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Czech description
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Classification
Type
C - Chapter in a specialist book
CEP classification
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OECD FORD branch
20206 - Computer hardware and architecture
Result continuities
Project
<a href="/en/project/GA16-17538S" target="_blank" >GA16-17538S: Relaxed equivalence checking for approximate computing</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Others
Publication year
2019
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Book/collection name
Approximate Circuits - Methodologies and CAD
ISBN
978-3-319-99322-5
Number of pages of the result
29
Pages from-to
175-203
Number of pages of the book
463
Publisher name
Springer International Publishing
Place of publication
Heidelberg
UT code for WoS chapter
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