Cascaded Stripe Memory Engines for Multi-Scale Object Detection in FPGA

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F19%3APU134943" target="_blank" >RIV/00216305:26230/19:PU134943 - isvavai.cz</a>

Result on the web

<a href="https://ieeexplore.ieee.org/document/8573854" target="_blank" >https://ieeexplore.ieee.org/document/8573854</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1109/TCSVT.2018.2886476" target="_blank" >10.1109/TCSVT.2018.2886476</a>

Result language

angličtina

Original language name

Cascaded Stripe Memory Engines for Multi-Scale Object Detection in FPGA

Original language description

Object detection in embedded systems is important for many contemporary applications that involve vision and scene analysis. In this paper, we propose a novel architecture for object detection implemented in FPGA, based on the Stripe Memory Engine (SME), and point out shortcomings of existing architectures. SME processes a stream of image data so that it stores a narrow stripe of the input image and its scaled versions and uses a detector unit which is efficiently pipelined across multiple image positions within the SME. We show how to process images with up to 4K resolution at high framerates using cascades of SMEs. As a detector algorithm, the SMEs use boosted soft cascade with simple image features that require only pixel comparisons and look-up tables; therefore, they are well suitable for hardware implemenation. We describe the components of our architecture and compare it to several published works in several configurations. As an example, we implemented face detection and license plate detection applications that work with HD images (1280×720 pixels) running at over 60 frames per second on Xilinx Zynq platform. We analyzed their power consumption, evaluated the accuracy of our detectors, and compared them to Haar Cascades from OpenCV that are often used by other authors. We show that our detectors offer better accuracy as well as performance at lower power consumption.

Czech name

—

Czech description

—

Type

J_imp - Article in a specialist periodical, which is included in the Web of Science database

CEP classification

—

OECD FORD branch

10201 - Computer sciences, information science, bioinformathics (hardware development to be 2.2, social aspect to be 5.8)

Project

<a href="/en/project/LQ1602" target="_blank" >LQ1602: IT4Innovations excellence in science</a><br>

Continuities

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Publication year

2020

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Name of the periodical

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY

ISSN

1051-8215

e-ISSN

1558-2205

Volume of the periodical

30

Issue of the periodical within the volume

1

Country of publishing house

US - UNITED STATES

Number of pages

13

Pages from-to

267-280

UT code for WoS article

000521641800022

EID of the result in the Scopus database

2-s2.0-85058662945