Statistical Model Checking of Approximate Circuits: Challenges and Opportunities
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F20%3APU135363" target="_blank" >RIV/00216305:26230/20:PU135363 - isvavai.cz</a>
Result on the web
<a href="https://ieeexplore.ieee.org/document/9116207" target="_blank" >https://ieeexplore.ieee.org/document/9116207</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.23919/DATE48585.2020.9116207" target="_blank" >10.23919/DATE48585.2020.9116207</a>
Alternative languages
Result language
angličtina
Original language name
Statistical Model Checking of Approximate Circuits: Challenges and Opportunities
Original language description
Many works have shown that approximate circuits may play an important role in the development of resource-efficient electronic systems. This motivates many researchers to propose new approaches for finding an optimal trade-off between the approximation error and resource savings for predefined applications of approximate circuits. The works and approaches, however, focus mainly on design aspects regarding relaxed functional requirements while neglecting further aspects such as signal and parameter dynamics/stochasticity, relaxed/non-functional equivalence, testing or formal verification. This paper aims to take a step ahead by moving towards the formal verification of time-dependent properties of systems based on approximate circuits. Firstly, it presents our approach to modeling such systems by means of stochastic timed automata whereas our approach goes beyond digital, combinational and/or synchronous circuits and is applicable in the area of sequential, analog and/or asynchronous circuits as well. Secondly, the paper shows the principle and advantage of verifying properties of modeled approximate systems by the statistical model checking technique. Finally, the paper evaluates our approach and outlines future research perspectives.
Czech name
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Czech description
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Classification
Type
D - Article in proceedings
CEP classification
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OECD FORD branch
10201 - Computer sciences, information science, bioinformathics (hardware development to be 2.2, social aspect to be 5.8)
Result continuities
Project
<a href="/en/project/LQ1602" target="_blank" >LQ1602: IT4Innovations excellence in science</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Others
Publication year
2020
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE)
ISBN
978-3-9819263-4-7
ISSN
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e-ISSN
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Number of pages
4
Pages from-to
1574-1577
Publisher name
IEEE Computer Society
Place of publication
Grenoble
Event location
Grenoble
Event date
Mar 9, 2020
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
000610549200286