Using Control Logic Drivers for Automated Generation of System-level Portable Models

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F20%3APU138614" target="_blank" >RIV/00216305:26230/20:PU138614 - isvavai.cz</a>
Result on the web
<a href="https://www.fit.vut.cz/research/publication/12195/" target="_blank" >https://www.fit.vut.cz/research/publication/12195/</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/DDECS50862.2020.9095708" target="_blank" >10.1109/DDECS50862.2020.9095708</a>

Result language
angličtina
Original language name
Using Control Logic Drivers for Automated Generation of System-level Portable Models
Original language description
Portable Test and Stimulus Standard is a new Accellera standard for an abstract definition of the verification intent that can be used for stimuli generation for different types of verification environments and at different levels of design hierarchy. Despite the idea behind the standard is clear and well received by the general public, there is still a lot of work to make the magic happen inside of the interpretation tools. In this paper, we focus on vertical reuse of portable models which is basically about adapting portable models for block-level designs to portable models defined at the subsystem or system-level. This adaptation is usually based on manually defined (sub)system-level control restrictions and resources sharing restrictions. Our goal is to define algorithms which do transformations of portable models so as the restrictions are automatically added or suggestions for the user are made. In our first experiments, we focus on building control restrictions based on the control logic drivers extracted from the subsystem-level design. We present our first results on the floating-point unit and RISC-V processor-based subsystem as they fit to represents the vertical reuse in a clear manner.
Czech name
—
Czech description
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Project
—
Continuities
I - Institucionalni podpora na dlouhodoby koncepcni rozvoj vyzkumne organizace

Publication year
2020
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
23rd International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2020
ISBN
978-1-7281-9938-2
ISSN
—
e-ISSN
—
Number of pages
4
Pages from-to
1-4
Publisher name
Institute of Electrical and Electronics Engineers
Place of publication
Novi Sad
Event location
Novi Sad
Event date
Apr 22, 2020
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
000587761500022

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