Cartesian Genetic Programming Using Bit

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F49777513%3A23220%2F10%3A00503709" target="_blank" >RIV/49777513:23220/10:00503709 - isvavai.cz</a>

Result on the web

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DOI - Digital Object Identifier

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Result language

čeština

Original language name

Cartesian Genetic Programming Using Bit

Original language description

This paper deals with the evolutionary design of digital circuits. Concretely, it explores particular aspects of Cartesian Genetic Programming (CGP). The paper deals with the representation of a chromosome, especially the usage of a bit representation. An evolutionary algorithm using only bit operations is applied to CGP. Two circuits ? 3 bit x 2 bit multiplier and 5 bit majority circuit ? are used for algorithm power testing.

Czech name

Cartesian Genetic Programming Using Bit

Czech description

This paper deals with the evolutionary design of digital circuits. Concretely, it explores particular aspects of Cartesian Genetic Programming (CGP). The paper deals with the representation of a chromosome, especially the usage of a bit representation. An evolutionary algorithm using only bit operations is applied to CGP. Two circuits ? 3 bit x 2 bit multiplier and 5 bit majority circuit ? are used for algorithm power testing.

Type

D - Article in proceedings

CEP classification

JA - Electronics and optoelectronics

OECD FORD branch

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Project

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Continuities

S - Specificky vyzkum na vysokych skolach

Publication year

2010

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection

TELFOR 2010 : proceedings

ISBN

978-86-7466-392-9

ISSN

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e-ISSN

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Number of pages

4

Pages from-to

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Publisher name

TELFOR

Place of publication

Belgrade

Event location

Bělehrad, Srbsko

Event date

Nov 23, 2010

Type of event by nationality

EUR - Evropská akce

UT code for WoS article

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