Universal balancing method of flying capacitor converters

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F49777513%3A23220%2F21%3A43962670" target="_blank" >RIV/49777513:23220/21:43962670 - isvavai.cz</a>
Result on the web
<a href="https://ieeexplore.ieee.org/document/9542903" target="_blank" >https://ieeexplore.ieee.org/document/9542903</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.23919/AE51540.2021.9542903" target="_blank" >10.23919/AE51540.2021.9542903</a>

Result language
angličtina
Original language name
Universal balancing method of flying capacitor converters
Original language description
This paper describes novel method of balancing of multi-level flying capacitor converters. The proposed balancing block is placed behind PWM modulator instead of balancing table and it is independent on type of modulator nor number of levels. The method was simulated in ModelSIM and PLECS/Simulink and implemented in VHDL to FPGA. Function of the proposed algorithm was verified on the real seven level flying capacitor converter with three phase asynchronous machine.
Czech name
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Czech description
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Publication year
2021
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
International Conference on Applied Electronics (AE 2021) : /proceedings/
ISBN
978-80-261-0972-3
ISSN
1803-7232
e-ISSN
1805-9597
Number of pages
4
Pages from-to
21-24
Publisher name
University of West Bohemia
Place of publication
Pilsen
Event location
Pilsen, Czech Republic
Event date
Sep 7, 2021
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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